Circuit Analysis and Logic Design

Welcome to ELEC 3220SED, Circuit Analysis and Logic Design.

This course has mainly been adapted from the course T202 Analogue and Digital Electronics by the Open University in the UK. However some content has been added or updated due to advancements in technology, such as the Quine-McCluskey method in Unit 4 and Hardware Description Language (HDL) in Unit 6.

This Course Guide is designed to provide you with some essential information about the course and to assist you in planning your available study time to make the best use of it. The following sections present an overview of the course to help you see the course as a whole. You should therefore read this Course Guide before you start off with Unit 1.

The course's Presentation Schedule, accessible via the Online Learning Environment (OLE), shows the amount of time you should spend studying each unit of the course. This schedule can help you with the overall planning of your 32 weeks of study. To further assist in your detailed planning, the 'Course overview and outline' section of this Course Guide contains detailed outlines of each unit, showing how you are expected to allocate your time to each individual components of a unit. You will need to read the relevant unit outline each time you start your study of a new unit. These unit outlines will guide you in allocating your study time week-by-week as you progress through the course.

Course aims

The aims of this course are to:

• provide you with a basic concept of electrical principles and circuit theory;
• prepare you to solve problems in electronic systems;
• enable you to diagnose faults in electronic systems; and
• prepare you to design a circuit to meet a new performance specification.

Course learning outcomes

Upon completion of this course, you should be able to:

• explain basic electrical principles and work with different electronic equipment and various types of electronic components;
• apply electrical theories and laws to analyse and solve problems with both d.c. and a.c. electrical circuits;
• design and implement combinational and sequential systems;
• apply computer-aided design tools to simulate logic circuits; and
• explain different types of analogue-digital conversions and memory systems.

Course components

The course contains several components that are closely integrated to produce a coherent teaching package. The components are as follows.

• The study units. Units 1 to 8 form the main teaching medium of the course — you will spend most of your time reading these units and answering the self-assessment questions (SAQs) that they contain. You must tackle the SAQs as you read through the unit text, as they are the main means you have of testing whether you have understood the contents.
• Home computing. Throughout the course, some home computing exercises require you to use computer-aided design (CAD) software known as OrCAD 17.x to analyse circuit behaviour. These computing exercises are an essential component of the course, and the CAD software is provided as part of the course materials. You are required to have access to a Microsoft Windows PC or compatible running Windows 10; English Windows is preferred.
• OLE. This course uses the Online Learning Environment (OLE). There you will find course materials and the latest course information. You can also make use of the platform to communicate with your tutor, Course Coordinator and fellow classmates. You are recommended to visit the OLE regularly. For details about the OLE and how to access it, please refer to the Online Learning Environment User Guide.
• Short laboratories. Two 'short laboratory' sessions will be held in HKMU's laboratory on the Ho Man Tin campus. At these sessions, you will carry out experiments designed to reinforce the teaching of skills and knowledge and to assist in developing understanding. While attendance at these sessions is optional, much of the teaching in the texts assumes you have performed the experiments. Therefore if you do not attend these short laboratory sessions, you will find it harder to understand and learn from the texts. Also, some of the assignments may contain questions that you might not be able to answer fully unless you have attended the short laboratory sessions. Detailed information on the short labs will be provided on the OLE.
• Long laboratories. There are two 'long laboratory' sessions to be held at weekends in the HKMU laboratory near the end of the course. Each of these long labs lasts for several hours, providing an opportunity for you to engage in realistic design exercises, as well as to perform extended experiments to reinforce the learning of essential concepts. Attendance at these sessions is compulsory. If you do not attend, you cannot pass the course. Detailed information of the long labs will be provided on the OLE.
• Tutorials. There will be regular face-to-face tutorial sessions with your tutor, supporting the teaching in the study units. Specific information about the date, time and place of each tutorial will be provided on the OLE. Tutorial attendance is optional.
• Surgeries. Regular surgery sessions are scheduled throughout the course. A tutor will be available to answer specific problems that you may have with the coursework. These surgery sessions are intended to provide you with specific assistance with specific problems; the tutor will not run a tutorial, and will not have facilities for talking to more than a few students at a time. The surgeries provide the opportunity for you to resolve difficulties without having to wait for your next scheduled tutorial. Details of these surgery sessions will be provided on the OLE.
• Telephone counselling. You will be provided a time schedule of when you can call your tutor to discuss your questions if you require a prompt response from your tutor.

Course content

The course is divided into eight study units. The details are as follows.

Unit 1 Fundamental electrical principles

This unit, as its name suggests, introduces some of the basic concepts which you need to be familiar with before starting the course. Topics covered are: current, e.m.f., potential difference, electrical energy, electrical power, resistance and conductance, resistors in series and in parallel, and the measurement of current, voltage and resistance. A short lab introduces the use of a multimeter for the measurement of current, voltage and resistance, and contains some simple experiments to reinforce the concepts introduced in the unit.

Unit 2 Circuit theories

This develops some of the fundamental tools of circuit analysis in the context of d.c. resistive circuits. These concepts include: Kirchhoff's current and voltage laws, nodal analysis, ideal voltage and current sources, Thévenin and Norton equivalent circuits, and the Superposition principle. There is no short lab associated with this part of the block, but there is a substantial home computing component.

Unit 3 A.c. circuit analysis

This unit develops the basic ideas necessary for the analysis of a.c. circuits, namely, phasors, phasor diagrams, phasor notation, the operator j, complex numbers, phasor manipulations using complex numbers, and phasor operators. It then uses these tools to analyse a number of simple a.c. circuits and to obtain the a.c. voltage transfer function of these circuits. It contains short lab experiments and a number of home computing exercises.

Unit 4 Combinational circuits and implementation

This unit is concerned with the basic principles of combinational logic circuits, introducing the binary number system, binary signals, logic gates, de Morgan's theorem, codes and code conversion. Methods of obtaining Boolean expressions from the truth table of a system will be explained in this unit. While a Karnaugh map has the limitation of four input variables only, the tabular Quine-McCluskey method is explained with examples to demonstrate how this method can handle more input variables than four. This unit deals with the design of logic circuits. It describes the process of conversion from a truth table via a Karnaugh map or Quine-McCluskey method to the circuit (consisting of a combination of logic gates) that implements the required logic function. Devices introduced to implement logic circuits include SSI (small-scale integration) devices such as AND, OR, NAND and NOR gates, MSI (medium-scale integration) devices such as decoders and AND-OR-INVERT gates, and programmable devices such as PALs (programmable array logic devices) and PROMs (programmable, read-only memories). The unit ends with a description of the TTL (transistor-transistor logic) family of gate devices.

Unit 5 Sequential circuits and implementation

This unit is concerned with the design of sequential logic circuits. It describes a design method using the concepts of a general sequential machine, state transition diagram, state table and state assignment table. Specific sequential logic circuits are implemented using gates and memory elements such as D-type flip-flops. Counters are treated as a special set of examples of sequential logic circuits, and the design of synchronous counters using JK flip-flops is described. The unit ends with descriptions of the 555 timer, integrated circuit counters and PLSs (programmable logic sequencers).

Unit 6 Binary arithmetic and computer-aided design

This unit explains binary arithmetic such as 2's complement representation. Binary adders are also explained. This is followed by an introduction to the Field Programmable Gate Array (FPGA) and the tool Hardware Description Language (HDL). Lastly, another computer-aided design tool, namely OrCAD, will be explained and you will be guided to carry out some exercises.

Unit 7 Analogue-digital conversion

This unit discusses the conversion of analogue signals to digital form and vice versa. It first describes the digital-to-analogue (D-A) converter by two methods. One is the binary-weighted resistor network and the other is the R-2R ladder resistor network. It describes three different methods of analogue-to-digital (A-D) conversion — the flash converter, the counter-ramp converter and the successive approximation converter. It ends with descriptions of sample-and-hold devices and multiplexers. There is a short lab associated with this unit that requires you to investigate the characteristics of D-A and A-D converters.

Unit 8 Memory systems

The course ends with a description of memory systems. Unit 8 describes some of the circuit components used to store digital data, and how these components can be interconnected to form large memories. It deals with registers, RAM (random access memory), DRAM (dynamic RAM), SRAM (static RAM), and a range of different ROM (read-only memory) types.

Course assessment

The assessment of this course consists of a continuous assessment component and a final examination. Your progress throughout the course (the continuous assessment component) will be assessed through three assignments. One of them will be for the assessment of the long lab sessions. The other two will be for the assessment of the course materials. All of them are required for assessment. At the end of the course, you will be required to sit a two-hour examination.

Your overall course mark will be calculated from the results of your assignments and your final examination as follows.

The course grade is mainly determined by the overall course score (CS), yet students are normally required to obtain a minimum in both the overall examination score (OES) and overall continuous assessment score (OCAS) set by the University to obtain a 'pass' result. To be awarded a particular course grade, a student must meet the minimum CS set by the Award Committee.
The self-tests or SAQs are, by definition, not part of your formal assessment, but you must complete them as you work through the units. They not only expose you to the types of problems you are required to complete for your assignments, but they also reflect the demands of the course learning outcomes and unit objectives, and are designed to help you understand and apply the principles covered in the units.

Assignments

This course is designed to help you move easily from the required readings to the assignments and the examination. You are expected to apply information and techniques presented during the course when completing the assignments.

Assignments 1 and 3 assess your progress with the main study units, the home computing exercises and the short labs. Assignment 2 assesses your performance in the long labs.

How to do your assignments

For each assignment, first, read quickly through the description of the problem in the Assignment File. Make brief notes on what you believe are the key points raised. Next, carefully read the description two or three times while referring to your notes. Make sure that you have identified all the key points. Then, read the instructions that accompany the problem. These explain what you are required to do. Make sure you understand what is required and that your assignment provides what is required.

When you have completed your assignment, you should submit it via e-submission on the OLE. Make sure that each assignment is uploaded to the OLE before the due date. The due dates can also be found on the Presentation Schedule. Marks may be deducted for work that is submitted late without prior authorisation. If, for any reason, you cannot complete your work on time, contact your tutor before the assignment is due. This is to discuss the possibility of an extension. Extensions will not be granted after the due date unless there are extremely exceptional circumstances.

You should use references other than your textbooks or work when researching the answers for your assignments. Make sure that you reference your work properly. If you do not, you will commit plagiarism and will be penalised severely. Plagiarism is the theft of somebody else's work or ideas. This applies just as much to using the work of other students as it does to the authors of books. If you use somebody else's ideas in your work, give them credit for it. You do this by referencing. In the body of the work, this appears as '(Stallings, 2000)' for example. At the end of your assignment, list all of your references alphabetically in a section called 'References'. Include the full name, title and date and place of publication. For instance, one way to cite a reference is:

Stallings, W (2000) Computer Organization and Architecture (5th ed.), Upper Saddle River, NJ: Prentice Hall.

Final examination

The final examination is a written paper of two hours, and you will attempt the questions without the help of any notes or printed materials related to the course. A simple scientific calculator is allowed. You will be sent a Specimen Examination Paper, which resembles the actual paper in both style and format, so that you can get some idea of what to expect.

Learning support

The assessment of this course consists of a continuous assessment component and a final examination. Your progress throughout the course (the continuous assessment component) will be assessed through three assignments. One of them will be for the assessment of the long lab sessions. The other two will be for the assessment of the course materials. All of them are required for assessment. At the end of the course, you will be required to sit a two-hour examination.

Throughout the course you will be given regular learning support in the form of tutorials, surgeries, short labs and long labs. All these activities are optional except for the long lab sessions. The long lab sessions are compulsory. You need to complete them; otherwise you will fail the course. Details of the dates and times of these sessions can be found in the Presentation Schedule. In addition, telephone counselling and support from the tutor through email and the Online Learning Environment (OLE) will be provided.

The following table provides an overview of the support sessions provided.

Overview

The following table shows the amount of study time allocated to each unit of the course.

Unit outlines

The breakdown of the study hours for the individual parts of each unit is described in each of the detailed unit outlines that follow. Before starting each unit, you should read the unit outline to plan the use of your time effectively. The Presentation Schedule shows how the tutorials, short labs and assignments relate to your study of the units.

The order of study and the approximate study time for each section of the units is shown below. This assumes that the time that you spend studying the course is about seven hours per week (on average) for the 32 weeks of the course, plus the time spent at weekend labs and tutorials.

Unit 1 Fundamental electrical principles

This unit is scheduled to occupy about two weeks.

Section 1 of this unit introduces the basic structure of this course and the relationship with other courses offered by HKMU. It also starts with the prefixes which are commonly used in electronics.

Section 2 explains the very basic concepts of voltage, current, potential difference, energy, power, resistance and conduction. The relationship between them is discussed.

Section 3 describes the overall resistance and conduction in series or in parallel connection. Then you will study the use of voltage and current dividers.

Section 4 explains how to use voltmeters and ammeters as measuring devices. Errors introduced in measurement are also explained.

You are advised to attend a short lab which is designed to give you practical experience in using an ammeter and voltmeter, generally called a multimeter. The practical experience connecting light bulbs in series or in parallel can also help you understand the concept of this unit.

Unit 2 Circuit theories

This unit is scheduled to occupy about three weeks.

Section 1 is an introduction to the general methods of solving a circuit. To solve a circuit is just to find the branch current and node voltage of the circuit. Also it brings out the requirement of using a software package as an example of computer-aided design as the circuit gets more complicated.

Section 2 explains the drawing convention and terminology used in an electrical circuit. In particular, mesh or loop and branch are clearly explained.

Section 3 introduces Kirchhoff's voltage and current laws which are commonly used in solving a circuit.

Section 4 explains the method of using nodal analysis. The detailed procedure and method are explained.

Section 5 describes in detail the features of a constant voltage source and a constant current source.

Section 6 explains the analysis of a circuit containing a constant current source. The analysis of a resistor network connected as a cube structure is shown as an example.

Section 7 brings out the concept of using a computer-aided design (CAD) package.

Section 8 explains the method of applying Thévenin and Norton theorem and principles of superposition to solve a circuit.

Unit 3 A.c. circuit analysis

This unit is scheduled to occupy about three weeks.

This unit develops the basic ideas necessary for the analysis of a.c. circuits, namely, phasors, phasor diagrams, phasor notation, the operator j, complex numbers, phasor manipulations using complex numbers, and phasor operators. You will then use these tools to analyse a number of simple a.c. circuits and to obtain the a.c. voltage transfer function of these circuits. The unit contains short lab experiments and a number of home computing exercises.

Section 1 gives you an introduction to a.c. analysis techniques. In a.c. circuits using sinusoidal sources, the waveform is the sum of different sinusoidal frequency components. Therefore the representation of sinusoids by phasors is employed in a.c. circuit analysis.

Section 2 shows the difference between resistance and reactance by using a circuit consisting of inductance, resistance and capacitance. It also introduces you to the term phase angle of a sinusoid.

Section 3 works out the sinusoidal response of a capacitor and an inductor. This helps you understand how the capacitive reactance and inductive reactance vary with frequency.

In section 4, a simple circuit consisting of a resistor and a capacitor is analysed to see how the phase and magnitude across the capacitor changes with respect to the frequency.

Section 5 illustrates the phasor diagram which consists of magnitude and phase angle.

Section 6 works out an example of a low-pass RC circuit to demonstrate what phasor analysis is.

In section 7, the voltage gain between input and output voltages of an a.c. circuit is worked out with details. The impedance as compared to resistance is shown.

In section 8, phasor manipulations including addition, subtraction, multiplication and division using the operator j are explained with examples.

In sections 9 and 10, impedance and admittance of a low-pass RC circuit are analysed by using operator j.

Section 11 gives you a summary of Unit 3.

Unit 4 Combinational circuits and implementation

This unit is scheduled to occupy about five weeks.

Sections 1 to 5 give you an introduction to what a simple combinational logic circuit is by giving you an example of an interlock circuit. The concept and binary inputs and outputs are explained and the use of truth tables to represent the system is presented.

Section 6 discusses Boolean algebra and how the minterms of a truth table are combined to form a Boolean expression.

In section 7, the Karnaugh map is introduced for the simplification of Boolean expressions of up to four input variables.

In section 8, the Quine-McCluskey method is explained with detailed procedures. Different examples consisting of three, four and five input variables are presented with detailed steps and explanation.

Section 9 explains the term 'gate-equivalence', which reflects the relative complexity of an integrated circuit.

Section 10 gives the electrical characteristics of different logic families. A simple comparison is made between them.

Section 11 provides a summary of Unit 4.

Unit 5 Sequential circuits and implementation

This unit is scheduled to occupy about six weeks.

Sections 1 to 3 of this unit are concerned with the design of sequential logic circuits. They describe a design method using the concepts of a general sequential machine, state transition diagram, state table and state assignment table.

In section 4, specific sequential logic circuits are implemented using gates and memory elements such as SR latch, gated D latch and D-type flip-flops.

In section 5, a special set of examples of sequential logic circuits such as synchronous counters, modulo-n counters and divide-by-n counters using JK flip-flops is described.

In section 6, the asynchronous inputs for the sequential logic components are explained.

This unit ends with a section with descriptions of the 555 timer, integrated circuit counters and PLSs (programmable logic sequencers) and a summary of Unit 5.

Unit 6 Binary arithmetic and computer-aided design

This unit is scheduled to occupy about six weeks.

Sections 1 and 2 of this unit explain the 2's complement number representation. You will be able to determine the validity of the addition of 2's complement numbers.

Sections 3 and 4 describe binary arithmetic by using half adder and full adder circuits. They also explain how subtraction is done with the adders.

While schematics using the basic logic gates are sufficient for describing small circuits, they are impractical for designing more complex digital systems. In contemporary computer systems design, HDL has become intrinsic to the design process. Consequently, we introduce HDL in sections 5 and 6 of this unit.

HDLs resemble programming languages, but are specifically oriented to describing hardware structures and behaviour. They differ markedly from typical programming languages in that they represent extensive parallel operation, whereas most programming languages represent serial operation.

You will learn some very basic algorithms of HDL. At the end of this unit, you will be able to write the HDL for a simple logic circuit diagram.

This unit continues with an explanation of FPGA. It contains an array of programmable logic blocks. The logic blocks can be configured to perform complex combinational functions by using HDL.

Section 7 of this unit introduces another concept of a computer-aided design tool, the OrCAD. You will make use of this tool to build up various digital circuits without physically connecting the actual circuit for analysis. You can create inputs by simulation to test the behaviour of the logic circuits.

Unit 7 Analogue-digital conversion

This unit is scheduled to occupy about two weeks.

Section 1 of this unit introduces the advantages of converting analogue signals to digital format. Subsequently the digital signals are required to be converted back to analogue.

We then describe the digital-to-analogue (D-A) converter in section 2. Two types of D-A converters are explained, namely the binary-weighted resistor network and the R-2R ladder resistor network.

Section 3 describes three different methods of analogue-to-digital (A-D) conversion — the flash converter, the counter-ramp converter and the successive approximation converter.

Sections 4 and 5 end the unit with descriptions of sample-and-hold devices and multiplexers. There is a short lab associated with this part of the block that requires you to investigate the characteristics of D-A and A-D converters.

Section 6 summarises Unit 7.

Unit 8 Memory systems

This unit is scheduled to occupy about three weeks.

This unit describes some of the circuit components used to store digital data, and how these components can be interconnected to form large memories. It deals with registers, RAM (random access memory), DRAM (dynamic RAM), SRAM (static RAM), and a range of different ROM (read-only memory) types.

Section 1 provides a brief introduction to different types of memory.

Section 2 describes how gated D latches are combined to make a data register. A small memory system is presented to show how address decoding is done. It then discusses the use of tri-state devices to combine outputs.

Section 3 explains random access memory (RAM). The nature of different types of RAM is explained. It then demonstrates how a memory system of a certain memory size can be implemented with memory chips of different capacities. Memory read and write cycles are also explained so that you can have knowledge of the requirements for reading or writing a memory component.

Section 4 describes the read-only memory (ROM). The nature and choice of different types of ROM is explained in this section.

Section 5 explains how to choose the correct type of memory components based on cost and functionality.

ELEC 3220SED Circuit Analysis and Logic Design will provide you with a basic understanding of how to deal with digital systems and methods for solving problems in electric circuits. The course will be delivered over two terms and will include eight study units, short and long laboratory sessions and home computing exercises. You will be supported throughout the course by tutorials and surgeries as well as the OLE and telephone counselling. Course assessment will be done through three assignments and a final examination.

We hope that you find the course useful and stimulating.

A note about the developer of this course

This course is adapted from the UKOU course T202 Analogue and Digital Electronics with the addition of new materials. Mr Leung Chung Shing, the developer/adapter of ELEC 3220SED, has been in the Flight Operations Department of Cathay Pacific Airways for 34 years. His main role is to develop flight simulators for the company. The simulators are sophisticated training devices composed of advanced electronic equipment.

From a teaching perspective, Mr Leung has taught in a number of tertiary education institutions such as Hong Kong Polytechnic University and the Vocational Training Council before joining the Open Learning Institute, now Hong Kong Metropolitan University, in 1989.

His teaching area covers telecommunications, electronics, programming languages and microcomputer systems.